Reduced-Complexity Concurrent Systolic Implementation of the Discrete Sine Transform
Pramod Kumar Meher, A. P. Vinod, Jagdish C. Patra, M.N.S. Swamy · 2006
In this paper, a reduced complexity algorithm for computation of the discrete sine transform (DST) is presented. The proposed algorithm can be used to compute an N-point DST from two pairs of [(M - l)/2]-point identical cyclic convolutions, where M is a prime number and M = N/2. A regular and locally connected linear systolic array architecture is also presented for concurrent pipelined VLSI implementation of all the four cyclic convolutions. The proposed structure is not only simpler, but also involves significantly less area-time complexity compared to that of the existing convolution-based DST structures. Unlike some of the existing structures, it does not need any control tag-bits for implementation of convolution-like operations