Research and Implement of Serial RapidIO Based on Mul-DSP
Juan Zhang, Haibing Su, Qinzhang Wu, Juan Zhang · 2009
In order to solve an intra-system interface for chip-to-chip and board-to-board communications and meet the explosive demand for higher bandwidth and more efficient signal processing and data transmission in typical embedded system, here is an active demand that adopting a new system interconnect technology to ensure that bus performance continues to increase. The RapidIO is proposed in the paper. Up to 10 Gb/s of bandwith, low latency and low power meet the demand on the performance of rapid developing communication technologies. The paper introduces the basic principle, inner architecture and the key technique of the RapidIO, research its application and based on DSP TMS320C6455. It shows the design of RapidIO transmission between different DSP. The paper gives the flow of the software design. The experiment results show that the read and write operation can stably work at 3.125 Gb/s per channel between different DSP. The rate is up to 275 MB/s when the baud rate is 3.125 Gbps.