Test pattern generation for logic crosstalk faults in VLSI circuits
Antonio Rubio, J.A. Sainz, K. Kinoshita · IEE Proceedings G Circuits Devices and Systems · 1991
The paper investigates test pattern generation (TPG) for logic circuits in which transient logic errors are likely to be produced by crosstalk interference between nodes. Algebraic and algorithmic approaches for TPG of combinational circuits are presented and applied to several example circuits.