Synthesis of Multiplierless FIR Filter by Efficient Sharing of Horizontal and Vertical Common Subexpression Elimination
Yasuhiro Takahashi, Kazukiyo Takahashi, M. YOKOYAMA · 2004
Abstract: This paper proposes a novel method to be used for VLSI design of canonic signed digit (CSD) linear phase finite impulse response filter with a small number of adders and registers. This proposed method is an efficient way to find the correct bit-patterns for horizontal and vertical common subexpression elimination technique. Through examples, it is shown explicitly that this proposed method gives the lowest implementation compared to other methods. 1.