Hierarchical synchronization scheme using self-timed mesochronous interconnections
S. Kim, Rishika Iytha Sridhar · 2002
As technology advances, keeping purely synchronous clocking scheme for a large, high-speed design becomes increasingly difficult, mainly due to the difficulties in controlling interconnection delays. This paper presents a two-level synchronization scheme. A complex system is divided into several independently clocked modules. Communication between the modules is achieved by an interconnection scheme called "self-timed mesochronous interconnection". The delay independence of the scheme eliminates the need for judicious control of the clock distribution network and of data interconnects. Experiments on two structures, unidirectional and signal joining cases, have shown that the scheme operates regardless of the amount of clock skew and interconnection delay between modules.