Rectification of multiple logic design errors in multiple output circuits
Masahiro Tomita, Tamotsu Yamamoto, 文徳 澄川, Kotaro Hirano · 1994
This paper presents the EXMalgorithm, which locates multiple logic design errors in a combinational circuit with multiple output.An error possibility index and a sixvalued simulation method have been introduced to reduce the number of error candidates without missing real errors.Experimental results have shown that this algorithm locates all errors at high hit ratio for benchmark circuits.(3)Indicate error location(s) exactly: what gate(s) or what line(s) are erroneous.(4)Provide detailed solutions for error rectification.Recent researchers have tried to tackle the logic diagnosis problem [2]-[12].However, conventional approaches cannot satisfy above requirements, especially with (1) and (2).In general, logic design errors are embedded in a limited number of locations in the circuit.In order to avoid confusing the designers and to reflect their intention on the circuit, the number of locations changed for error rectification should be as few as possible.Therefore, a logic diagnosis technique should be applicable to line errors as well as gate errors.There are O(nm) possible combinations when considering m errors on n elements.Modeling missing-line errors greatly increases the combinations up to O(n2m) due to the variations in from-to pairs with each line error.Thus, there has been no rectification technique applicable to multiple line errors in a circuit of practical size.