A 3.3 V 1 Gb multi-level NAND flash memory with non-uniform threshold voltage distribution
Taehee Cho, Young-Taek Lee, Euncheol Kim, Jinwook Lee, Sunmi Choi, Seungjae Lee, Dong-Hwan Kim, Wook-Kee Han, Young-Ho Lim, Jae-Duk Lee, Jungdal Choi, Kang-Deog Suh · 2002
A 1 Gb NAND flash memory with 2b per cell uses 0.15 /spl mu/m CMOS and achieves simultaneous operation of 4 independent banks with 1.6 GMB/s program throughput. Fusing enables changing to 512 Mb 1b-per-cell NAND flash memory. Wordline ramping minimizes noise and peak current. Disturb mechanisms and noise related V/sub TH/ distribution shifts are minimized to improve read margins.