Structured board level simulation using Verilog
RICK WANZENRIED · 2002
Board level simulation is an area of growing interest given the high levels of integration and complexity on boards today. The main motivation for performing a board level simulation is to improve design quality and shorten the design cycle through fewer circuit board turns. This paper presents a high level interface method used to control a board level simulation that has been implemented on an acquisition board design within Tektronix. The main strategic advantages to the interface method that was used include re-usability of the simulation modules, a simplified interface for firmware verification, and versatility in sub-section testing.>