Parallel FPGA technology mapping using multi-core architectures
Andrew A. Kennings, Chirag Ravishankar · 2011
We present a parallelization of a modern FPGA technology mapper suitable for use on a multi-core processor which exploits the inherent data parallelism of the algorithm. Our parallel mapper is deterministic regardless of the number of cores available which is important in an industrial context. Without any compromise in the quality of result, we show average speed-ups of 1.5X to 3.2X on a dual-core and quad-core multi-processor, respectively.