Interactive Debug of SoCs with Multiple Clocks
Bart Vermeulen, Kees G. W. Goossens · IEEE Design & Test of Computers · 2011
Systems with elaborate multiple clock distributions are a necessity, and the authors address the postfabrication debug of such multiclock systems. Solutions, based on the authors' communication-centric debug approach, are presented that achieve a consistent snapshot of the system state and force the erroneous state in the face of nondeterminism.