Interactive register transfer level synthesis using library blocks
Anne Mignotte, Michael Bertrand, M. Crastes, J. Fron, Jérôme Rampon · 2003
The synthesis system presented here starts from an initial register transfer level description. This description uses operators and registers defined in a block library. The system synthesizes automatically a circuit consisting of a datapath and a controller with several data path and controller style possibilities. Optimization of the design reconsidering the separation between the data path and the controller as well as the register allocation is performed in the final step. >