A single-motion-vector/cycle-generation optical flow processor employing directional-edge histogram matching
Kazuhide Fujita, Kiyoto Ito, Tadashi Shibata · 2009
A VLSI optical flow processor capable of generating a single motion vector at every clock cycle has been developed. By employing a directional-edge histogram matching, the computational cost has been reduced and the influence of illumination change has been alleviated as well. In order to generate an edge histogram in a single clock cycle, a special data allocation scheme in on-chip SRAM banks has been developed. In addition, a parallel shift and matching architecture using compact absolute difference circuits has been introduced. As a result, single-motion-vector/cycle generation from an arbitrary pixel location has been established. A prototype chip was fabricated in a 0.18-mum 5-metal CMOS technology and the measurement results demonstrated about 1,000 times faster performance at a clock frequency of 20 MHz than the software processing using a 2.8-GHz CPU.