Architecture of fault-tolerant multiprocessor workstations
J. P. Banâtre, Michel Banâtre, Gilles Muller · 2003
A fault-tolerant multiprocessor architecture that is based on standard processors associated with stable storage boards is presented. The hardware architecture of the stable storage board and its software interface are briefly described. The hardware organization of the fault-tolerant multiprocessor is detailed, and some functionalities of a secure kernel are examined. The current status of the project is indicated.>