An algorithmic incremental and iterative development method to parallelize dusty-deck FORTRAN HPC codes in GPGPUs using CUDA
Nima Ghaemian, Mohsen Sharifi, Behrouz Minaei Bidgoli, Ramin Orujov · 2009
State-of-the-art high-speed and economical graphic card processors (GPUs) provide high multiprocessing power for high performance computing (HPC). But software development for high performance computing is profound and requires a good comprehension of algorithms, applications, and architectures. This paper outlines an incremental and iterative software development process for porting dusty-deck HPC application source codes to a selected GPU-enabled architecture. A new type of dependency, namely recurrent transmission dependency, is introduced. Some experiments are reported.