A novel booster plate technology in high density NAND flash memories for voltage scaling-down and zero program disturbance

Jaehyuk Choi, D.J. Kim, D.S. Tang, J. Kim, H.S. Kim, W.C. Shin, S.T. Ahn, Ohjo Kwon · 2002

The booster plate in NAND flash memory cells gives numerous advantages: the reduction of program, erase and pass voltages, zero program disturbance and increased cell current. At the same time, it is simple to integrate the technology to the conventional fabrication processes. It is expected that the booster plate technology will become one of the key technologies for achieving high density memories such as 256 Mbit and 1 Gbit NAND flash.

Read the paper · More papers on PaperTik