Architectural optinuization of decimation filter using bitstream operation in GSM audio codec
J. Kuriakose, S. Ristic, D. aan de Stegge, G. de Cremoux · 2004
This paper proposes an efficient architectural optimization method for the decimation stages in single bit sigma-delta modulators using multiplier-less FIR filters over direct implementation of FIR filters P.P. Vaidyanathan (1990), R.E. Crichiere (1983) for GSM applications. The proposed method uses adders to implement multiplication in filters.