A simulated annealing approach for high-level synthesis with reconfigurable functional units
José Matías Alves, J.S. Matos · 2002
In this paper, we present an application of the simulation annealing optimization algorithm to the problem of high-level synthesis of digital systems, targeted to architectures with run-time reconfigurable functional units. The scheduling, allocation and binding problems are treated simultaneously. Reconfiguration times and execution delays are taken into account, along with pipelined execution and precise clock cycles for consumption of each operand.