Analysis of current-to-data dependency in asynchronous cryptographic circuits
Radu Mureşan, Stefano Gregori · Conference proceedings · 2007
This paper presents analysis of current-to-data dependency for a circuit implementing the DES algorithm. The circuit is realized in CMOS 0.18 mum technology as an asynchronous design with optimized XOR gates and enable encryption signal randomly delayed from cycle-to-cycle. Initial results using Spice simulation waveforms show that the DPA attack is unsuccessful.