Work-efficient routing algorithms for rearrangeable symmetrical networks
Hasan Çam, J.A.B. Fortes · IEEE Transactions on Parallel and Distributed Systems · 1999
The work performed by a parallel algorithm is the product of its running time and the number of processors it requires. This paper presents work-efficient (or cost-optimal) routing algorithms to determine the switch settings for realizing permutations on rearrangeable symmetrical networks such as Benes and the reduced /spl Omega//sub N//spl Omega//sub N//sup -1/. These networks have 2n-1 stages with N=2/sup n/ inputs/outputs, each stage consisting of N/2 crossbar switches of size (2/spl times/2). Previously known parallel routing algorithms for a rearrangeable network with N inputs determine the states of all switches recursively in O(n) iterations using N processors. Each iteration determines the switch settings of at most two stages of the network and requires at least O(n) time on a computer of N processors, regardless of the type of its interconnection network. Hence, the work of any previously known parallel routing algorithm equals at least O(Nn/sup 2/) for setting up all the switches of a rearrangeable network. The new routing algorithms run on a computer of p processors, 1/spl les/p/spl les/N/n, and perform work O(Nn). Moreover, because the range of p is large, the new routing algorithms do not have to be changed in case some processors become faulty.