Easily testable iterative unidimensional CMOS circuits
Antonio Rubio, R. Anglada, Joan Figueras · 2003
The C-testability of combinational unidimensional iterative circuits implemented in CMOS technology is discussed. In this technology the stuck-open faults impose additional requirements beyond the usual C-testability conditions. The requirements are considered for the classical adder and incrementer circuits, and these circuits are shown to be potentially C-testable even when stuck-open faults are taken into account. C-testable sets of test patterns that detect all the single stuck-open and all the single stuck-at faults are presented. Results for Moore-type sequential iterative circuits are also presented.>