FPGA Based Parallel Thinning for Binary Fingerprint Image
Hui Xu, Yifan Qu, Yan Zhang, Feng Zhao · 2009
A critical step in fingerprint recognition is to skeletonize the fingerprint image for minutiae extraction, which is recognized as "thinning" in image processing. The speed and reliability of the thinning process are important for the whole fingerprint identification system. In this paper, to accelerate the thinning process, a fast hardware thinning algorithm is implemented on the Xilinx Virtex II Pro developing system with a highly-paralleled architecture. Appealing experimental result is presented and the advantage of hardware thinning is also explored.