Semi-Algorithmic Test Pattern Generation
Hadi Shahriar Shahhoseini, B.H. Kazerouni · IEEE International Conference on Computer Systems and Applications, 2006. · 2006
Nowadays, the reliability and correctness of digital circuits has become increasingly important. In addition, digital systems design methodology has been changing to HDL-based design. Thus the test methods which are based on behavioral level design would be broadly applicable. The other factor primarily influencing the practical field of application of a specific test generation algorithm is the computational complexity of the algorithm. Random test pattern generation algorithms are much simple than the other types of algorithms. Hence, developing such algorithms is exceedingly beneficial. In this paper, an extension to random test pattern generation is proposed which makes it semi-algorithmic, so it is called SAT. SAT generates some parts of test vectors deterministically for the conditional nodes of the circuit’s CFG extracted from VDHL code. Simulation shows the quality of SAT generated test sets, according to path coverage, is better than ones produced by uniformly random test pattern generation.