Fast redundant binary partial product generators for booth multiplication
Bijoy Antony Jose, Damu Radhakrishnan · Conference proceedings · 2007
The use of signed-digit number systems in arithmetic circuits has the advantage of constant time addition irrespective of word length. In this paper, we present the design of a binary signed-digit partial product generator, which expresses each normal binary operand in one's complement form with an extra bit denoting the sign bit of the operand. The carry free nature of RBAs is exploited to add the extra bits with the partial products, without using additional adder stages. This technique allows RB encoding to be used in multipliers with operand widths which are perfect powers of two, without increasing the delay of partial product accumulation. The proposed partial product generator achieves the highest reduction in the number of partial products for a radix-4 multiplier (78%), by combining advantages of RB encoding with RB addition. The proposed partial product generator together with a set of fast redundant binary adder stages configured in a binary tree fashion can result in the design of high performance multipliers.