A novel DFT technique for testing complete sets of ADCs and DACs in complex SiPs
Vincent Kerzérho, Philippe Cauvet, Serge Bernard, Florence Azais, Mariane Comte, M. Renovell · IEEE Design & Test of Computers · 2006
Testing mixed-signal circuits remains one of the most difficult challenges within the semiconductor industry. In this article, the authors present a novel DFT technique to test sets of ADCs and DACs embedded in a complex SiP. The technique provides fully digital testing on the converters to significantly reduce the cost of testing