Very-high-speed analog neural network LSI implementation using super self-aligned Si bipolar process technology
Shigeki Aisawa, Kazuto Noguchi, Masafumi Koga, Takao Matsumoto, Yoshiyuki Amemiya · 2005
A very-high-speed ten-neuron analog neural network LSI chip is fabricated for the first time with super self-aligned Si bipolar process technology. The LSI consists of ten neurons and 100 electrically modifiable synaptic weights. The neural network nonlinear mapping function to solve the four-bit parity problem has been successfully demonstrated at 150 megapatterns/sec. The operation speed of this neural network is, to the best of the authors' knowledge, the fastest yet reported.