COBRA: a 100-MOPS single-chip programmable and expandable FFT
T. Chen, G. Sunada, Jian Xun Jin · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 1999
This paper presents an optimized column fast Fourier transform (FFT) architecture, which utilizes bit-serial arithmetic and dynamic reconfiguration to achieve a complete overlap between computation and communication. As a result, for a clock rate of 40 MHz, the system can compute a 24-b precision 1K point complex FFT transform in 9.2 /spl mu/s, far surpassing the performance of any existing FFT systems.