Three-dimensional field-programmable gate arrays
Michael J. Alexander, James P. Cohoon, J.L. Colflesh, John E. Karro, Gabriel Robins · 2002
Motivated by improving FPGA performance, we propose a new three-dimensional (3D) FPGA architecture, along with a fabrication methodology. We analyze the expected manufacturing yield, and raise several physical-design issues in the new 3D paradigm. Our techniques also have good implications for resource utilization, physical size, and power consumption.