On minimizing hardware overhead for pseudoexhaustive circuit testability
Dimitri Kagaris, Fillia S. Makedon, Spyros Tragoudas · 2003
A self-contained method with very low bypass storage cell (BSC) overhead is presented. The method uses a graph model to represent the circuit under test. This unifying model makes the method applicable to both the gate level and the module level. A non-necessarily-partitioning technique reduces the number of BSCs considerably.>