HW/SW co-design for multi-core system on ESL virtual platform
I-Yao Chuang, Tso-Yi Fan, Chi-Hung Lin, Chun-Nan Liu, Jen-Chieh Yeh · 2011
Multi-core system and the associated software parallelization techniques have become one of the major trends of SoC design. A multi-core system with high hardware efficiency and software parallelism has the potential of achieving higher system performance and lower power consumption. This paper reveals how system performance prediction and analysis for multi-core system can be done at early design stage before having implemented the real chip by adopting ESL design methods and virtual platform techniques that has high timing accuracy and simulation speed. Based on the multi-core ESL virtual platform, we have performed one to eight DSP-cores system performance analysis and obtained the performance trend observation. Moreover, the software parallelization experiments to observe the performance improvement are explored.