An FPGA based move generator for the game of chess
Marc Boulé, Z. Zilic · 2003
This paper details the architecture of an FPGA chess-move generator. The design is based on Deep Blue's move generator. The inherent differences between ASICs and FPGAs imply many design changes. We present improvements that exploit important FPGA features (lookup-table based logic, routing resources, distributed and block RAM).