A hardware-efficient VLSI implementation of a 4-channel ICA processor for biomedical signal measurement
Chiu-Kuo Chen, Ericson Chua, Chih-Chung Fu, Shao-Yen Tseng, Wai-Chi Fang · 2011
This paper presents a 4-channel ICA implementation in the separation of EEG signals for on-line monitoring and analysis of brain functionalities. A novel ICA architecture utilizing mixed sequential, pipelined, and parallel processing units and employing interleaved and circular-based RAM modules to achieve hardware-efficient design is presented. The ICA processor is fabricated using UMC 90nm High-Vt CMOS technology.