Design and Analysis of a New Self-Testing Adder Which Utilizes Polymorphic Gates
Lukáš Sekanina · 2007
This paper describes a new self-testing 1-bit full adder. This circuit consists of three polymorphic NAND/NOR gates, two XOR gates and two inverters. The adder is able to detect a reasonable number of stuck-at-faults without the need of any additional logic and diagnostic signals. A fault is indicated by oscillations at the carry-out output. Properties of n-bit carry-propagate adder which is composed of the proposed 1-bit self-testing adders are investigated.