ESTA: an expert system for DFT rule verification
Paolo Enrico Camurati, Paolo Gianoglio, R. Gianoglio, P. Prinetto · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 1988
A description is given of ESTA, an expert system for the automation of design for testability (DFT) verification. The system takes descriptions written in a conventional hardware description language as input, translates them into a intermediate Prolog form and checks whether they comply either with the level sensitive scan design (LSSD) DFT method of B. Eichelberger and T.W. Williams (1977) or the built-in logic block observation (BILBO) DFT techniques of B. Konemann et al. (1979).>