A feasibility study of on-wafer wireless testing
Piljae Park, C. Patrick Yue · 2008
The feasibility of on-wafer wireless test is assessed in this paper. By replacing expensive high-frequency probe cards with wireless data link, testing cost can potentially be lowered. Key elements for wireless test at the wafer level include on-chip antenna and RF transceivers. A 24-GHz on-chip folded dipole antenna has been designed to fit in the scribe-lines between the silicon dies. The measured antenna gain shows -22.6 dBi. The power budget for a data link between a wafer with on-chip antenna and a tester equipped with high-gain horn antenna is presented. Our finding verifies that the required SNR and antenna bandwidth for wireless test can be achieved. Based on the measured antenna characteristics, several wireless test examples are illustrated.