On the implementation of systolic IIR/FIR filters
M.K. Ibrahim, Djamel Ait-Boudaoud · 1991
Two IIR/FIR (infinite impulse response/finite impulse response) systolic arrays with a novel cell architecture are presented together with a comparison of their performance with existing implementations. These arrays are based on the direct form I realization. Bidirectional dataflow is used in both arrays and they still produce one output every cycle with a clock rate unchanged from that of a conventional cell. Type 1 array allows 100% hardware utilization, while type 2 uses one basic cell for FIR and IIR realization.>