Self-biasing and self-amplifying MOSFET mismatch test structure
Colin C. McAndrew, Mike Zunino, Brandt Braswell · 2012
This paper presents a 4-transistor test structure for measurement and characterization of MOSFET mismatch. The structure consists of a CMOS inverter with its output connected to its input, so it self-biases at a point of high sensitivity to parametric variations from mismatch, connected to a second identical inverter. The voltage difference between the outputs of the first and second inverters depends primarily on transistor mismatch, and is of order of 100's of mV and so is easily measurable even in a noisy or poor quality test environment. Several applications of the new structure are presented.