A design of time-optimum and register-number-minimum systolic convolver
Hiroshi Umeo · 1987
We present an optimum bit-parallel/word-sequential systolic convolver. Our design is the best one among the previous many convolvers in the sense that its optimality in time and space performances is simultaneously attained without augmenting any global control, broadcasting, preloading, and/or multi sequential or parallel I/O ports, which were allowed in most of the previous designs. As an application of our convolver we give a systolic polynomial divider which can compute the polynomial division in exactly n + 0(1) steps on [min (n−m, m)/2] + 0(1) systolic cells, for the division of any degree n polynomial by any degree m polynomial(n ≧ m).