Fast multivariate signature generation in hardware: The case of rainbow
Sundar Rajan Balasubramanian, Harold W. Carter, Andrey Bogdanov, Andy Rupp, Jíntai Ding · 2008
This paper presents a time-area efficient hardware architecture for the multivariate signature scheme Rainbow. As a part of this architecture, a high-performance hardware optimized variant of the well-known Gaussian elimination over GF(2l) and its efficient implementation are presented. The resulting signature generation core of Rainbow requires 63,593 gate equivalents and signs a message in just 804 clock cycles at 67 MHz using AMI 0.35μm CMOS technology. Thus, Rainbow provides significant performance improvements compared to RSA and ECDSA.