Partition-and-shift LDPC codes
Jin Lu, José M. F. Moura · IEEE Transactions on Magnetics · 2005
This paper describes a new type of regular structured low-density parity-check (LDPC) code: the partition-and-shift LDPC (PS-LDPC) code. PS-LDPC codes can be easily designed to have large girth. The code construction is simple to explain: we divide the bit and check nodes in the Tanner graph into subsets and connect nodes in these subsets according to a set of parameters called shifts. We derive a general theorem on the shifts to prevent cycles that are harmful to LDPC decoding. This theorem provides a methodology to design PS-LDPC codes with arbitrary column weight j and large girth g. Simulation results over EPR4 channels demonstrate the good bit-error rate performance of PS-LDPC codes.