Design and use of a system-level specification and verification methodology
M. M. Kamal Hashmi, Alistair C Bruce · European Design Automation Conference · 1995
This paper describes the problem of Design Capture at System level and of moving a design verifiably down levels of abstraction. We describe our steps on the way to designing a methodology which captures system level interface and functional specifications, and enables the designers to decompose and refine specifications down to RTL VHDL in a hierarchic and piece-wise manner.