HAsim: FPGA-based high-detail multicore simulation using time-division multiplexing
Michael Pellauer, Michael Adler, Michel A. Kinsy, Angshuman Parashar, Joel Emer · 2011
In this paper we present the HAsim FPGA-accelerated simulator. HAsim is able to model a shared-memory multicore system including detailed core pipelines, cache hierarchy, and on-chip network, using a single FPGA. We describe the scaling techniques that make this possible, including novel uses of time-multiplexing in the core pipeline and on-chip network. We compare our time-multiplexed approach to a direct implementation, and present a case study that motivates why high-detail simulations should continue to play a role in the architectural exploration process.