A Reconfigurable Cluster-on-Chip Architecture with MPI Communication Layer
John A. Williams, Ikram Hussain Syed, J. Wu, Neil W. Bergmann · 2006
In this paper, the authors present a reconfigurable cluster-on-chip architecture and supporting parallel programming software library based on the well-known message passing interface (MPI) standard. The intent is to allow designers to program multi-core reconfigurable systems on chip using the same or similar methodologies that yielded tremendous productivity improvements in the workstation and HPC cluster community. Additionally the architecture is designed to support native hardware processing modules to participate in the MPI network as fully-fledged peers