Logic synthesis method for FPGAs with embedded memory blocks
Mariusz Rawski, B.J. Falkowski, Tadeusz Łuba · 2008
The paper presents a logic synthesis method oriented towards FPGA architectures with specialized embedded memory blocks. Existing methods do not ensure effective utilization of possibilities provided by these specialized embedded modules. The presented method, based on balanced decomposition, leads to much more effective implementations of digital systems in modern FPGA structures.