A method for generating weighted random test patterns
John A. Waicukauski, Eric Lindbloom, E. B. Eichelberger, Orazio Forlenza · IBM Journal of Research and Development · 1989
A new method for generating weighted random patterns for testing LSSD logic chips and modules is described. Advantages in using weighted random versus either deterministic or random test patterns are discussed. An algorithm for calculating an initial set of input-weighting factors and a procedure for obtaining complete stuck-fault coverage are presented.