A new approach to derive robust sets for stuck-open faults in CMOS combinational logic circuits
J. F. Wang, T.-Y. Kuo, J.-Y. Lee · 1989
In this paper, we address the problem of deriving robust tests for single stuck-open faults in CMOS combinational circuits. We first examine the characteristics of the transition of the two patterns belonging to a two-pattern test. Then, a sufficient and necessary condition for a test to be robust is given. According to the given condition, we propose a new method to derive robust tests. Robustness verification of the derived tests is no longer required when using our approach.