On mapping a tracking algorithm onto parallel processors

Krishna Rao Pattipati, T. Kurien, R.-T. Lee, Peter B. Luh · IEEE Transactions on Aerospace and Electronic Systems · 1990

The problem of mapping the tasks of a multitarget tracking algorithm onto parallel computing architectures to maximize speedup is considered. An asymptotically optimal mapping algorithm is developed and applied to study the effects of task granularity and processor architectures on the speedup. From the simulation results, it is concluded that task granularity and the parallelization of clustering and global hypotheses formation stages of the tracking algorithm are major determinants of speedup.>

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