A Microcomputer with a Shift-Register Memory
Kartashev · IEEE Transactions on Computers · 1976
A study of architecture for an 8-bit microprogrammed microcomputer (MPM) is presented in this paper. The control memory of this microcomputer is implemented as a dynamic shift-register memory (SRM). It is shown that the use of the SRM simplifies the processor circuits to such an extent that the entire CPU can be placed on a single LSI module. A new type of instruction (the tabled instruction) introduced not only simplifies organization of data exchange between the SRM and the processor, but also allows organizing of complex control sequences. It is shown that some tabled instructions implement the actions which ordinarily are performed by small subroutines of conventional microprogrammed computers. Other features of the MPM are more 1) a powerful set of instructions and 2) greatly simplified programming, since hundreds of processor registers are made available to the programmer.