Systolic and parallel realization of 2-D IIR digital filters
Hon Keung Kwan · 2002
A method for multi-input and multi-output systolic realization of 2-D infinite-impulse-response (IIR) digital filters is presented. The filter transfer functions under consideration are first-order and second-order, and also of orthogonal symmetry with separable denominator format. Because of its multi-input and multi-output systolic architecture, it is most suitable for high-speed processing of computationally intensive signals such as images. The method utilizes parallelism to speed up computation, providing a practical solution to real-time recursive digital filtering. The resultant architecture is regular and systolic and could be easily adapted for VLSI implementation.>