A (208,192;8) Reed-Solomon decoder for DVD application
Rsie-Chia Chang, C.B. Shung · 2002
The Digital Versatile Disk (DVD) is an emerging standard to meet the ever increasing storage capacity requirement of future high quality video and audio applications. We implement a (208,192;8) Reed-Solomon decoder for the DVD Reed-Solomon product code (RS-PC). We propose a new area-efficient architecture which uses only three finite field multipliers (FFMs) to implement the inversionless Berlekamp-Massey (1968, 1979, 1969) algorithm. The error value evaluator employs an algorithm-based GF(2/sup m/) inverter instead of an inversion ROM-table. We implement the (208,192; 8) Reed-Solomon decoder using a 0.6 /spl mu/m SPDM CMOS technology with an area of 12.35 mm/sup 2/ (core area 6.45 mm/sup 2/). The chip can run at 16.67 MHz, while the DVD requirement is 3.74 MHz. A minor error was found in this first version which is corrected in the second version of the chip.