A high-level synthesizer for VLSI array architectures dedicated to digital signal processing
Tung-Hao Huang, Chi-Min Liu, Chein-Wei Jen · 1991
A package, named VLSI array architectures synthesizer (VAAS), to synthesize VLSI array architectures for DSP applications is presented. VAAS has been imbedded with the systematical synthesis method for systolic arrays, two-level pipelined systolic arrays, and multiple-array architectures. It provides a design environment with an algorithm description language, 3D graphical representations, performance evaluation, array simulation, a library of systolic algorithms, etc. Based on the environment, feasible VLSI array architectures for a DSP application can be exploited quickly. Two design examples are used to demonstrate the package.>